University of California, Riverside

Bourns College of Engineering



Sheldon Tan


Faculty Profile

Faculty Profile

Sheldon Tan

Professor of Electrical and Computer Engineering
Sheldon Tan

Ph.D. Electrical Engineering
University of Iowa, 1999

Department of Electrical and Computer Engineering                                                           424 Winston Chung Hall
University of California, Riverside
Riverside, CA 92521

Telephone: 951-827-5143
Facsimile: 951-827-2425
E-mail: stan@ece.ucr.edu
Personal Webpage

Former Institution: Altera Corporation

Biography

Sheldon Xiang-Dong Tan received his B.S. and M.S. degrees in electrical engineering from Fudan University, Shanghai, China in 1992 and 1995 respectively, and his Ph.D. degree in electrical and computer engineering from the University of Iowa, Iowa City, in 1999. He also is a cooperative faculty member in the Department of Computer Science and Engineering at UCR. Prof. Tan is a Guest Professor of Fudan University, Shanghai, China. Dr. Tan co-authored the book, “Symbolic Analysis and Reduction of VLSI Circuits," by Springer in 2005. He also co-authored book Symbolic Analysis and Reduction of VLSI Circuits by Springer/Kluwer 2005 and Advanced Model Order Reduction Techniques for VLSI Designs, by Cambridge University Press 2007. He is a technical program committee member of ASPDAC, BMAS, ASPDAC, ISQED, ICCAD. Dr. Tan is a senior member of IEEE.

Degrees

  • Ph.D. Electrical Engineering 1999 University of Iowa
  • M.S. Electrical Engineering 1995 Fudan University
  • B.S. Electrical Engineering 1992 Fudan University

Awards

  • Best Paper Award Nomination, 46th IEEE/ACM Design Automation Conference, Anaheim, CA, 2009
  • Outstanding Oversea Investigator Collaboration Award, National Natural Science Foundation of China (NSFC), 2008
  • Best Paper Award, IEEE Int. Conf. on Computer Design (ICCD), Lake Tahoe, CA, 2007
  • Best Paper Award Nomination, 42th IEEE/ACM Design Automation Conference, Anaheim, CA, 2005
  • NSF CAREER Award, 2005.
  • Best Paper Award from 1999 IEEE/ACM Design Automation Conference

Research Areas

Dr. Tan research interests include several aspects of design automation for VLSI integrated circuits – modeling and simulation of analog/RF/mixed-signal VLSI circuits, high performance power and clock distribution network simulation and design, signal integrity, power modeling, architecture-level thermal modeling, thermal optimization in nanometer VLSI design, and embedded system designs based on FPGA platforms. He has published 2 books, over 120 journal and conference papers and gave over 30 invited presentations, tutorials and short courses at conferences and workshops.He has published over 130 journal and conference papers and gave over 30 invited presentations and tutorials at conferences and workshops. is serving as an Associate Editor for three journals: ACM Transaction on Design Automation of Electronic Systems (TODAE), Integration, The VLSI Journal, and Journal of VLSI Design.

Selected Publications

  • Sheldon X.-D. Tan and Lei He, Advanced Model Order Reduction Techniques for VLSI Designs, Cambridge University Press, 2007, ISBN-13 978-0-521-86581-4,
  • W. Wu, L. Jin, , J. Yang, P. Liu and S. X.-D. Tan, “Efficient power modeling and software thermal sensing for runtime temperature monitoring ”, ACM Transaction on Design Automation of Electronic Systems (TODAES), vol. 12, no. 3, August, 2007.
  • B. Liu, S. X.-D. Tan, “Minimum decoupling capacitor insertion in VLSI power/ground supply networks by semidefinite and linear programs”, IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), vol. 15, no. 11, pp. 1284-1287, Nov. 2007
  • N. Mi, J. Fan, S. X.-D. Tan, Y. Cai and X. Hong, “Statistical analysis of on-chip power delivery networks considering lognormal leakage current variations with spatial correlations”, IEEE Transaction on Circuit and System I (in press).
  • B. Yan, S. X.-D. Tan, B. McGaughy, “Second-order balanced truncation for passive-order reduction of RLCK circuits”, IEEE Transaction on Circuit and System II (TCAS-II), vol. 55 no. 9, pp. 942-946, Sept 2008.
  • N. Mi, B. Yan, S. X.-D. Tan, “Multiple block structure-preserving reduced order modeling of interconnect circuits” Integration, The VLSI Journal (in press). (online permanent DOI link)
  • S. X.-D. Tan, P. Liu, L. Jiang, W. Wu, M. Tirumala, “A fast architecture-level thermal analysis method for runtime thermal regulation”, ASP Journal of Low Power Electronics (JOLPE), vol. 4, no. 4, August, pp.139-148, 2008.
  • N. Mi, S. X.-D. Tan, Y. Cai and X. Hong, “Fast variational analysis of on-chip power grids by stochastic extended Krylov subspace method”, IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 27, no. 11, pp. 1996-2006, 2008.
  • D. Li, S. X.-D. Tan, L. Wu, “Hierarchical Krylov subspace based reduction of large interconnects”, Integration, The VLSI Journal (in press). (online permanent DOI link)
  • D. Li, S. X.-D. Tan, E. H. Pacheco, M. Tirumala, “Architecture-level thermal characterization for multi-core microprocessors”, IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), (in press).
  • R. Shen, S. X.-D. Tan, J. Cui, W. Yu, Y. Cai and G. Chen, “Variational capacitance extraction and modeling based on orthogonal polynomial method”, IEEE Transactions on Very Large Scale Integrated Systems (TVLSI), (in press).
  • H. Yu, C. Chu, Y. Shi and L. He and S. X.-D. Tan, “Fast analysis of large scale inductive interconnect by block structure preserved macromodeling”, IEEE

More Information 

General Campus Information

University of California, Riverside
900 University Ave.
Riverside, CA 92521
Tel: (951) 827-1012

College Information

Bourns College of Engineering
446 Winston Chung Hall

Tel: (951) 827-5190
Fax: (951) 827-3188
E-mail: collegeinfo@engr.ucr.edu

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